Record Details     « New Search       Brief Record Full Record MARC Record     Bibliographic Data 001    UPD-00000174091 005    20090716221300.0 008    010921s1996 nyu eng 020 ## $a0780311493 040 ## $aDENG 041 ## $aeng 042 ## $aDMLUC 090 ## $aTK 7872 P38$bM66 245 ## $aMonolithic phase-locked loops and clock recovery circuits :$btheory and design /$cedited by Behzad Razavi. 260 ## $aNew York :$bIEEE Press,$cc1996. 300 ## $aix, 498 p. :$bill. 650 #4 $aPhase-locked loops$xDesign and construction. 650 #4 $aTiming circuits$xDesign and construction. 650 #4 $aIntegrated circuits$xDesign and construction. 700 1# $aRazavi, Behzad. 905 ## $aFO 950 ## $aMonograph 852 ## $aUP$bDENG-II$hTK 7872 P38 M66$pUDEGB0028128$rRegular Circulation$xE-33414 842 ## $aBook           Physical Location University of the Philippines Diliman: College of Engineering Library II TK 7872 P38 M66           Digital Copy Not Available          Add to Book Cart  |   Download MARC